When data transfer is to be done between different clock frequency domains, Async FIFOs are used. These FIFOs provide a medium to avoid data loss due to difference in the two frequencies.
The calculation of Async FIFO Depth is the most important part in designing the inter-clock domain data transfer system. The FIFO Depth is dependent on the number of data bits to be transferred in one cycle and the difference in the frequencies of the clocks.
CALCULATION :-
Let the incoming data to the FIFO be at F1 Frequency, i.e. write frequency.
Let the reading be done at F2 Frequency.
Suppose, B number of bits are being written and read per cycle, then
FIFO Depth = B - (B/F2)*F1 , if F2 > F1
else
FIFO Depth = B - (B/F1)*F2 , if F1 > F2
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